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 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
* * * * THERMAL CHARACTERISTICS MAXIMUM RATINGS
Maximum Lead Temperature for Soldering Purpose, 1/8 from Case for 5 Seconds Thermal Resistance, Junction to Case Operating and Storage Junction Temperature Range Total Power Dissipation @ TC = 95_C Derate above 95_C Base Current -- Continuous -- Peak (Negative) Collector Current -- Continuous -- Peak Emitter-Base Voltage Collector-Emitter Voltage Collector-Emitter Voltage
(c) Motorola, Inc. 1995 Motorola Bipolar Power Transistor Device Data
NOTES: 1. Pulsed 5.0 ms, Duty Cycle 10%. 2. See page 3 for Additional Ratings on A Type. 3. Figures in ( ) are Standard Ratings Motorola Guarantees are Superior.
. . . designed for use in televisions.
Horizontal Deflection Transistor
SEMICONDUCTOR TECHNICAL DATA
MOTOROLA
REV 7
Collector-Emitter Voltages VCES 1500 Volts Fast Switching -- 400 ns Typical Fall Time Low Thermal Resistance 1_C/W Increased Reliability Glass Passivated (Patented Photoglass). Triple Diffused Mesa Technology for Long Term Stability
Characteristic
Rating
v
VCEO(sus)
Symbol
Symbol
TJ, Tstg
VCES
RJC
VEB
IC ICM
IB IBM
PD
TL
- 65 to + 115
BU208A
12.5 0.625
1500
Max
275
700
1.6
4.0 3.5
5.0 7.5
5.0
5.0 AMPERES NPN SILICON POWER TRANSISTOR 700 VOLTS
BU208A
Order this document by BU208A/D
CASE 1-07 TO-204AA (TO-3)
Watts W/_C
_C/W
Unit
Unit
Adc
Vdc
Vdc
Vdc
Vdc
_C
_C
1
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIII I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIII I I III II I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIII III I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII I I III I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIII I I III I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I III II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII I I III I I IIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
BU208A
1Pulse test: PW = 300 s; Duty cycle SWITCHING CHARACTERISTICS DYNAMIC CHARACTERISTICS ON CHARACTERISTICS1 OFF CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Fall time (see test circuit fig. 1) (IC = 4.5 Adc, IB1 = 1.8 Adc, LB = 10 H)
Storage Time (see test circuit fig. 1) (IC = 4.5 Adc, IB1 = 1.8 Adc, LB = 10 H)
Output Capacitance (VCB = 10 Vdc, IE = 0, ftest = 1 MHz)
Current-Gain Bandwidth Product (IC = 0.1 Adc, VCE = 5 Vdc, ftest = 1 MHz)
Base-Emitter Saturation Voltage (IC = 4.5 Adc, IB = 2 Adc)
Collector-Emitter Saturation Voltage (IC = 4.5 Adc, IB = 2 Adc)
DC Current Gain (IC = 4.5 Adc, VCE = 5 Vdc)
Emitter Base Voltage1 (IC = 0, IE = 10 mAdc) (IC = 0, IE = 100 mAdc)
Collector Cutoff Current1 (VCE = rated VCES, VBE = 0)
Collector-Emitter Sustaining Voltage (IC = 100 mAdc, L = 25 mH)
2
Characteristic
v 2%.
ALL TYPES
VCEO(sus)
VCE(sat)
VBE(sat)
Symbol
VEBO
ICES
Cob
hFE
fT
ts
tf
Motorola Bipolar Power Transistor Device Data
2.25 Min 700 5 -- -- -- -- -- -- -- -- Typ 125 0.4 -- -- -- -- 7 -- -- 8 4 Max 1.5 1.0 -- -- -- -- -- -- -- -- 1 mAdc MHz Unit Vdc Vdc Vdc Vdc pF s s
BU208A
+ 40 V + 40 V 7 mH 0.5 F 250 F 0.3 A FUSE 130 V POWER SUPPLY
1K
1K
400 mA 6.5 mH 1 F Ly = 1.3 mH
1N5242 (12 V) 10 K
100 LB 820 10 nF MPSU04 T.U.T. 1A 1500 V 22 nF 22 nF
3 TBA920 14 10 nF 15
1 2 16 100 220 680 nF RB 0.56 680 F
10 K
2K7 2K 3K3
Figure 1. Switching Time Test Circuit
80 POWER DISSIPATION (W)
60
40
20
0
40
80 120 TC, CASE TEMPERATURE (C)
160
200
Figure 2. Power Derating
Motorola Bipolar Power Transistor Device Data
3
BU208A
BASE DRIVE The Key to Performance
By now, the concept of controlling the shape of the turn-off base current is widely accepted and applied in horizontal deflection design. The problem stems from the fact that good saturation of the output device, prior to turn-off, must be assured. This is accomplished by providing more than enough IB1 to satisfy the lowest gain output device hFE at the end of scan I CM. Worst-case component variations and maximum high voltage loading must also be taken into account. If the base of the output transistor is driven by a very low impedance source, the turn-off base current will reverse very quickly as shown in Fig. 3. This results in rapid, but only partial collector turn-off, because excess carriers become trapped in the high resistivity collector and the transistor is still conductive. This is a high dissipation mode, since the collector voltage is rising very rapidly. The problem is overcome by adding inductance to the base circuit to slow the base current reversal as shown in Fig. 4, thus allowing access carrier recombination in the collector to occur while the base current is still flowing. Choosing the right LB Is usually done empirically since the equivalent circuit is complex, and since there are several important variables (I CM, I B1, and h FE at I CM). One method is to plot fall time as a function of L B, at the desired conditions, for several devices within the h FE specification. A more informative method is to plot power dissipation versus I B1 for a range of values of LB. This shows the parameter that really matters, dissipation, whether caused by switching or by saturation. For very low LB a very narrow optimum is obtained. This occurs when IB1 hFE ICM, and therefore would be acceptable only for the "typical" device with constant ICM. As LB is increased, the curves become broader and flatter above the IB1. hFE = ICM point as the turn off "tails" are brought under control. Eventually, if LB is raised too far, the dissipation all across the curve will rise, due to poor initiation of switching rather than tailing. Plotting this type of curve family for devices of different hFE, essentially moves the curves to the left, or right according to the relation IB1 hFE = constant. It then becomes obvious that, for a specified ICM, an LB can be chosen which will give low dissipation over a range of hFE and/or IB1. The only remaining decision is to pick IB1 high enough to accommodate the lowest hFE part specified. Neither LB nor IB1 are absolutely critical. Due to the high gain of Motorola devices it is suggested that in general a low value of IB1 be used to obtain optimum efficiency -- eg. for BU208A with ICM = 4.5 A use IB1 1.5 A, at ICM = 4 A use IB1 1.2 A. These values are lower than for most competition devices but practical tests have showed comparable efficiency for Motorola devices even at the higher level of IB1. An LB of 10 H to 12 H should give satisfactory operation of BU208A with ICM of 4 to 4.5 A and IB1 between 1.2 and 2 A.
^
[
[
TEST CIRCUIT WAVEFORMS
IB
IB
IC (TIME)
IC (TIME)
Figure 3
Figure 4
TEST CIRCUIT OPTIMIZATION
The test circuit may be used to evaluate devices in the conventional manner, i.e., to measure fall time, storage time, and saturation voltage. However, this circuit was designed to evaluate devices by a simple criterion, power supply input. Excessive power input can be caused by a variety of problems, but it is the dissipation in the transistor that is of fundamental importance. Once the required transistor operating current is determined, fixed circuit values may be selected.
4
Motorola Bipolar Power Transistor Device Data
BU208A
13 12 hFE, DC CURRENT GAIN 11 10 9 8 7 6 5 4 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 IC, COLLECTOR CURRENT (A) 5.0 10 VCE = 5 V VCE(sat) , COLLECTOR-EMITTER SATURATION VOLTAGE (V) 14 0.5
0.4
0.3 IC/IB = 3 0.2 IC/IB = 2
0.1
0 0.1
0.2
0.5 1.0 2.0 IC, COLLECTOR CURRENT (A)
5.0
10
Figure 5. DC Current Gain
Figure 6. Collector-Emitter Saturation Voltage
VCE(sat) , COLLECTOR-EMITTER SATURATION VOLTAGE (V)
1.6 VBE, BASE-EMITTER VOLTAGE (V) 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.1 0.2 0.5 1.0 2.0 5.0 10 IC/IB = 2
2.8 2.4 2.0 1.6 IC = 4.5 A 1.2 0.8 0.4 0.1 0.2 0.5 1.0 2.0 5.0 10 IC = 2 A IC = 3 A IC = 3.5 A IC = 4 A
IC, COLLECTOR CURRENT (A)
IB, BASE CURRENT CONTINUOUS (A)
Figure 7. Base-Emitter Saturation Voltage
Figure 8. Collector Saturation Region
15 10 5 IC, COLLECTOR CURRENT (A) 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001
IC (max.) ICM (max.)
1 s 2 5 10 20 50 100 200 300 1 ms 2 ms
TC 95C BONDING WIRE LIMIT THERMAL LIMIT SECOND BREAKDOWN LIMIT DUTY CYCLE 1% 1 2 5 10 20 50 100 200
D.C.
BU208, A1 500 1000 2000 1Pulse width 20 s. Duty cycle 0.25. RBE 100 Ohms.
VCE, COLLECTOR-EMITTER VOLTAGE (V)
Figure 9. Maximum Forward Bias Safe Operating Area
Motorola Bipolar Power Transistor Device Data
5
BU208A
PACKAGE DIMENSIONS
A N C -T- E D U V
2 2 PL SEATING PLANE
K
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. ALL RULES AND NOTES ASSOCIATED WITH REFERENCED TO-204AA OUTLINE SHALL APPLY.
0.13 (0.005) L G
1
TQ
M
Y
M
-Y-
H
B
-Q- 0.13 (0.005)
M
TY
M
DIM A B C D E G H K L N Q U V
INCHES MIN MAX 1.550 REF --- 1.050 0.250 0.335 0.038 0.043 0.055 0.070 0.430 BSC 0.215 BSC 0.440 0.480 0.665 BSC --- 0.830 0.151 0.165 1.187 BSC 0.131 0.188
MILLIMETERS MIN MAX 39.37 REF --- 26.67 6.35 8.51 0.97 1.09 1.40 1.77 10.92 BSC 5.46 BSC 11.18 12.19 16.89 BSC --- 21.08 3.84 4.19 30.15 BSC 3.33 4.77
STYLE 1: PIN 1. BASE 2. EMITTER CASE: COLLECTOR
CASE 1-07 TO-204AA (TO-3) ISSUE Z
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JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
6
Motorola Bipolar Power Transistor Device Data
*BU208A/D*
BU208A/D


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